Applet IntroductionToTesting uses both logical and graphical circuit representations.
Logical level is done using SSBDD models, variable and node names in model are used for
binding state and fault tables with graphics.

NOTE: Names are case sensitive!

Preferred structure for graphical file (see drawings.txt) is as follows:

1) { Checkpoints area }
2) { Wire area }
3) { Component area }
4) { Input/Output names }
5) { End Of File Marker }



1)	{ Checkpoints area }
Every checkpoint is colored red (see color codes in drawings.txt),
shape ELLIPSE (FILLED) (5x5, H & W respectively).
Checkpoints are placed moustly 20 points away from gate input or
 fan-out point. For outputs, checkpoints are 40 points away.

Every chekpoint has to be named, otherwise it cannot be activated on SchematicsPane.

NOTE:Node names in gate level SSBDD represent checkpoint names

Coordinate comuting : ( X-2, Y-2 ), where (X,Y) is point where checkpoint should be.

         |~~~~
  --o----|
         |____
    |
    |<-->| 20 points

  ~|
   |--------o------
  _|
            |
   |<------>| 40 points

   Checkpoint : o - shape ELLIPSE, FILLED, color RED, (X-2, Y-2), 5x5 in size



2.0)	{ Wire area }
Connections between inputs, gates and outputs. Wires are also named objects (for marking
active faults, signals etc).

If there is fan-out, then there isn't one wire anymore. Fan-out is constructed as following:

             2
        |~~~~
   1    |    3
  ------*----
        |
        |____4

  This fan-out example has 4 branches. Wire segment 1 should have set of
  names of 2, 3, 4 and its own name. (when marking faults, conflicts).
  Wire segments 2, 3, 4 must have responding node name as identificator.

  wire - shape POLYLINE, color DEFAULT (black).
  NOTE: keep distance from other wires about 10 points. Good for readability.
 
2.1)	{Connection point} 
  * - shape ELLIPSE, FILLED, color DEFAULT( black ), (X-4, Y-4), 9x9 in size
	
NOTE:Wire names must match responding SSBDD node names


3.0)	{ Component area }
Every component area has more subfields:
	{ Component name }
	{ Component box/border }
	{ Component symbol }
	[ if inverted output { Inverted output } ]

	(X,Y) anchor point for component

3.1	{ Component name } - Component identificator on circuit plan.
	- shape TEXT, color PINK, FILLED, BOLD, SCALE 2.5x2.5, (X+5, Y-2)

3.2	{ Component box/border }
	- shape POLYLINE, color DEFAULT (black)

	NOTE: input/output pin distances 20 points. For example, 2NOR should
	be a box, measuring 40x60 points, (X,Y); (X+40, Y); (X+40, Y+60); (X, Y+60)

3.3	{ Component symbol }
	- shape TEXT, color DEFAULT (black), FILLED, SCALE 3.0x3.0, (X+5, Y+25)

3.4	{ Inverted output }
	- shape ELLIPSE, color DEFAULT (black), 9x9, (X+WIDTH, Y+HEIGHT/2)
	Where W and H are component width and heighth respectively.

4)	{ Input/Output names }
	-shape TEXT, color DEFAULT, FILLED, SCALE 3.0x3.0
		for input names (X-10, Y-2 ), where (X, Y) are input pin coordinates
		for output names (X, Y-2 ), where (X, Y) are output pin coordinates


Example:

       |<-->| 40 points

       |~~~~|      ~~~
  -----|    |       ^
       |    +----   | 60 points
  -----|    |       |
       |____|      _v_

	Pin distances are 20 points, measured from edges and between pins

       
5)	{ End Of File Marker } - see drawings.txt.

	0
		EOF
