IAY0600
Digital Systems Design (LABS)
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To stimulate the student’s activity a project-based evaluation approach is adopted. Grading consists of control of knowledge in examinations and of the demonstration of the projects and the quality of written reports (40 points in final grade for doing compulsary labs, up to 80 points in final grade for doing optional labs).
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Lecturer:
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associate professor Alexander Sudnitson
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Lab Assistant:
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research scientist Dmitri Mihhailov
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Tech. Assistant:
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early stage research scientist Artjem Rjabov
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Lab Syllabus !!! :
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[PDF]
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Reports and source files:
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dmitri.mihhailov@ttu.ee (cc: aleksander.sudnitson@ttu.ee) [MAILTO]
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LAB defense booking:
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Group A (Wednesday)
[WEEK3]
[WEEK4]
[WEEK5]
[WEEK6]
[WEEK7]
[WEEK8]
[WEEK9]
[WEEK10]
[WEEK11]
[WEEK12]
[WEEK13]
[WEEK14]
[WEEK15]
[WEEK16]
[WEEK17]
Group B (Wednesday)
[WEEK3]
[WEEK4]
[WEEK5]
[WEEK6]
[WEEK7]
[WEEK8]
[WEEK9]
[WEEK10]
[WEEK11]
[WEEK12]
[WEEK13]
[WEEK14]
[WEEK15]
[WEEK16]
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Results:
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[LINK]
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LABS SET I (Xilinx FPGA-based)
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Requirements and Deadlines:
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Tutorials are optional
Labs 2-5 are compulsory
Nominal deadline for Labs 2-5 is 16th week
All compulsary Labs give 40 points to the final grade
Labs 6-9 are optional
Nominal deadline for optional Labs 6-9 is 16th week
Optional Lab 6 gives additional 10 + 10 points to the final grade
Optional Lab 7 gives additional 10 points each to the final grade
Optional Lab 8 gives additional 5 points each to the final grade
Optional Lab 9 gives additional 5 points each to the final grade
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Tasks:
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- Tutorials: Vivado [PDF]
- Comparator [PDF]
- Adder [PDF]
- Parameterizable Adder [PDF]
- Serial Adder [PDF]
- Finite-State Machine: FSM Synthesis [PDF] and Low Power (optional) [PDF]
- Greatest Common Divisor [PDF]
- Creeping Line [PDF]
- LFSR [PDF]
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Appendixes:
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- Nexys 4 DDR FPGA Board
[PDF]
[XDC]
- Xilinx Vivado IDE User Guide
[PDF]
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Projects:
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- RISC Processor [PDF] Example [PDF] MIPS Processor Tutorial [LINK]
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LABS SET II (Altera FPGA-based)
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Requirements and Deadlines:
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Tutorials 1 and 4 are optional
Labs 2-3 are optional
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Tasks:
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- Tutorial [PDF]
- VGA Port and PS/2 Mouse Port [PDF]
- IR Remote Control and LCD Display [PDF]
- System on a Programmable Chip Design (Tutorial) [PDF] Source Files [ZIP]
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Appendixes:
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- DE2-115 Manual [PDF]
- Video DAC Manual [PDF]
- IR Transmitter Manual [PDF] IR Receiver Manual [PDF]
- LCD Manual [PDF]
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Links:
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- VHDL Tutorial [LINK]
- VGA Timing Information [LINK]
[LINK]
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